IC Layout Articles

The  first and seemingly most important step is to ensure that the Product Development Kit (PDK) is fine tuned and well supported.  IE: Device level placements will be made accurately the first time if auto cell abutment "Servers" are working properly.  Another example of the importance of PDK development and use is routing.  Any senior level… Continue reading TSMC 7nm Custom Analog / Digital Layout Methods Utilizing Cadence Virtuoso 6.17

Over the last 22 years of IC Layout Design work, I have had the fortune of working in some real cohesive team environments. Where we would always meet and exceed our goals. The circuit design engineers (our customers) worked very hard at creating the required designs. They created detailed notes in their "Circuit Master Plan".… Continue reading Effective Communication = 1st Pass Layout Success

A long time ago, semiconductors "Time From Concept To Market" were about 2 years on the average.  Today the average is about 2 months.  A typical Circuit Design Engineer running a race from getting a design working in test simulation to DRC/LVS/(etc.) ready for prototype masks is full of uncertainties and risks. The obvious solution… Continue reading VPN + VNC=Solutions For Tight Schedules